EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 66

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.7.12 DMA_CHENC - Channel Enable Clear Register
31:8
7
6
5
4
3
2
1
0
31:8
7
6
5
4
3
2
1
0
Bit
Offset
0x02C
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
Reserved
CH7ENS
Write to 1 to enable this channel. Reading returns the enable status of the channel.
CH6ENS
Write to 1 to enable this channel. Reading returns the enable status of the channel.
CH5ENS
Write to 1 to enable this channel. Reading returns the enable status of the channel.
CH4ENS
Write to 1 to enable this channel. Reading returns the enable status of the channel.
CH3ENS
Write to 1 to enable this channel. Reading returns the enable status of the channel.
CH2ENS
Write to 1 to enable this channel. Reading returns the enable status of the channel.
CH1ENS
Write to 1 to enable this channel. Reading returns the enable status of the channel.
CH0ENS
Write to 1 to enable this channel. Reading returns the enable status of the channel.
Reserved
CH7ENC
Write to 1 to disable this channel. See also description for channel 0.
CH6ENC
Write to 1 to disable this channel. See also description for channel 0.
CH5ENC
Write to 1 to disable this channel. See also description for channel 0.
CH4ENC
Write to 1 to disable this channel. See also description for channel 0.
CH3ENC
Write to 1 to disable this channel. See also description for channel 0.
CH2ENC
Write to 1 to disable this channel. See also description for channel 0.
CH1ENC
Write to 1 to disable this channel. See also description for channel 0.
CH0ENC
Name
Name
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW1
RW1
RW1
RW1
RW1
RW1
RW1
RW1
W1
W1
W1
W1
W1
W1
W1
W1
Access
Access
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Bit Position
66
Channel 7 Enable Set
Channel 6 Enable Set
Channel 5 Enable Set
Channel 4 Enable Set
Channel 3 Enable Set
Channel 2 Enable Set
Channel 1 Enable Set
Channel 0 Enable Set
Channel 7 Enable Clear
Channel 6 Enable Clear
Channel 5 Enable Clear
Channel 4 Enable Clear
Channel 3 Enable Clear
Channel 2 Enable Clear
Channel 1 Enable Clear
Channel 0 Enable Clear
Description
Description
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