EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 458

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

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29.15. LCD 1/3 Bias and Duplex Multiplexing - LCD_SEG0-LCD_COM0 .............................................................. 417
29.16. LCD 1/3 Bias and Duplex Multiplexing - LCD_SEG0-LCD_COM1 .............................................................. 417
29.17. LCD 1/2 Bias and Triplex Multiplexing - LCD_COM0 ............................................................................... 417
29.18. LCD 1/2 Bias and Triplex Multiplexing - LCD_COM1 ............................................................................... 418
29.19. LCD 1/2 Bias and Triplex Multiplexing - LCD_COM2 ............................................................................... 418
29.20. LCD 1/2 Bias and Triplex Multiplexing - LCD_SEG0 ............................................................................... 418
29.21. LCD 1/2 Bias and Triplex Multiplexing - LCD_SEG0 Connection ................................................................ 418
29.22. LCD 1/2 Bias and Triplex Multiplexing - LCD_SEG0-LCD_COM0 .............................................................. 418
29.23. LCD 1/2 Bias and Triplex Multiplexing - LCD_SEG0-LCD_COM1 .............................................................. 419
29.24. LCD 1/2 Bias and Triplex Multiplexing - LCD_SEG0-LCD_COM2 .............................................................. 419
29.25. LCD 1/3 Bias and Triplex Multiplexing - LCD_COM0 ............................................................................... 419
29.26. LCD 1/3 Bias and Triplex Multiplexing - LCD_COM1 ............................................................................... 419
29.27. LCD 1/3 Bias and Triplex Multiplexing - LCD_COM2 ............................................................................... 420
29.28. LCD 1/3 Bias and Triplex Multiplexing - LCD_SEG0 ............................................................................... 420
29.29. LCD 1/3 Bias and Triplex Multiplexing - LCD_SEG0 Connection ................................................................ 420
29.30. LCD 1/3 Bias and Triplex Multiplexing - LCD_SEG0-LCD_COM0 .............................................................. 420
29.31. LCD 1/3 Bias and Triplex Multiplexing - LCD_SEG0-LCD_COM1 .............................................................. 421
29.32. LCD 1/3 Bias and Triplex Multiplexing - LCD_SEG0-LCD_COM2 .............................................................. 421
29.33. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_COM0 ........................................................................ 421
29.34. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_COM1 ........................................................................ 421
29.35. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_COM2 ........................................................................ 422
29.36. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_COM3 ........................................................................ 422
29.37. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_SEG0 ......................................................................... 422
29.38. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_SEG0 Connection ......................................................... 422
29.39. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_SEG0-LCD_COM0 ........................................................ 423
29.40. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_SEG0-LCD_COM1 ........................................................ 423
29.41. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_SEG0-LCD_COM2 ........................................................ 423
29.42. LCD 1/3 Bias and Quadruplex Multiplexing- LCD_SEG0-LCD_COM3 ......................................................... 424
29.43. LCD Clock System in LCD Driver ........................................................................................................ 428
29.44. LCD Block Diagram of the Animation Circuit ......................................................................................... 430
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2010-09-06 - d0001_Rev1.00
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