EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 365

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

26.3.4 Mode
26.3.4.1 Single Ended Output
26.3.4.2 Differential Output
26.3.5 Sine Generator Mode
2010-09-06 - d0001_Rev1.00
Figure 26.2. DAC Bias Programming
The minimum value of the BIASPROG bitfield of the DACn_BIASPROG register (i.e.
BIASPROG=0b0000) represents the minimum bias current. Similarly BIASPROG=0b1111 represents
the maximum bias current. The bias current defined by the BIASPROG setting can be halved by setting
the HALFBIAS bit of the DACn_BIASPROG register.
The bias current settings should only be changed while both DAC channels are disabled.
The two DAC channels can act as two separate single ended channels or be combined into one
differential channel. This is selected through the DIFF bit in DACn_CTRL.
When operating in single ended mode, the channel 0 output is on DACn_OUT0 and the channel 1 output
is on DACn_OUT1. The output voltage can be calculated using Equation 26.2 (p. 365)
DAC Single Ended Output Voltage
where CHxDATA is a 12-bit unsigned integer.
When operating in differential mode, both DAC outputs are used as output for the bipolar voltage. The
differential conversion uses DACn_CH0DATA as source. The positive output is on DACn_OUT1 and
the negative output is on DACn_OUT0. Since the output can be negative, it is expected that the data is
written in 2’s complement form with the MSB of the 12-bit value being the signed bit. The output voltage
can be calculated using Equation 26.3 (p. 365) :
DAC Differential Output Voltage
where CH0DATA is a 12-bit signed integer. The common mode voltage is V
The DAC contains an automatic sine generator mode, which is enabled by setting the SINEMODE bit in
DACn_CTRL. In this mode, the DAC data is overridden with a conversion data taken from a sine lookup
table. The sine signal is controlled by the PRS line selected by PRSSEL in DACn_CH0CTRL. When the
PRS line is low, a voltage of Vref/2 will be produced. When the line is high, a sine wave will be produced.
The sine wave resets to 0 degrees when the PRS line selected in DACn_CH0CTRL goes high.
Reference
Current
V
BIASPROG
HALFBIAS
OUT
reference
bandgap
Internal
V
OUT
= V
DACn_OUT1
= V
DACn_OUTx
- V
DAC output
DACn_OUT0
- V
buffer
SS
= V
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365
ref
= V
x CHxDATA/4095
ref
x CH0DATA/2047
ref
/2.
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(26.2)
(26.3)