EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 309

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

22.3.1.3 Externally Clocked Quadrature Decoder Mode
2010-09-06 - d0001_Rev1.00
Only the underflow (UF) and overflow (OF) interrupt flags are set in this mode.
This mode is enabled by writing EXTCLKQUAD (0x3) to the MODE field in PCNTn_CTRL and disabled
by writing DISABLE (0x0) to the same field. The external pin clock source must be configured from the
registers in the CMU, (Chapter 11 (p. 90) ).
Both edges on PCNTn_S0IN pin are used to sample PCNTn_S1IN pin to decode the quadrature code.
Consequently, this mode does not depend on the internal LFACLK and may be operated in EM3. A
quadrature coded signal contains information about the relative speed and direction of a rotating shaft
as illustrated by Figure 22.2 (p. 309) , hence the direction of the counter register PCNTn_CNT is
controlled automatically.
Figure 22.2. PCNT Quadrature Coding
If PCNTn_S0IN leads PCNTn_S1IN in phase, the direction is clockwise, and if it lags in phase the
direction is counter-clockwise. Although the direction is automatically detected, the detected direction
may be inverted by writing 1 to the EDGE bit in the PCNTn_CTRL register. Default behavior is illustrated
by Figure 22.2 (p. 309) .
The counter direction may be read from the DIR bit in the PCNTn_STATUS register. Additionally, the
DIRCNG interrupt in the PCNTn_IF register is generated when a direction change is detected. When a
change is detected, the DIR bit in the PCNTn_STATUS register must be read to determine the current
new direction.
Note
The direction of the quadrature code and control of the counter is generated by the simple binary function
outlined by Table 22.1 (p. 310) . Note that this function also filters some invalid inputs that may occur
when the shaft changes direction or temporarily toggles direction.
The sector disc illustrated in the figure may be finer grained in some systems. Typically,
they may generate 2-4 PCNTn_S0IN wave periods per 360° rotation.
Clockwise direction
Counter clockwise
X = sensor position
direction
PCNTn_S1IN
PCNTn_S0IN
PCNTn_S1IN
PCNTn_S0IN
PCNTn_CNT
PCNTn_CNT
Reset
...the world's most energy friendly microcontrollers
309
1 cycle/sector, 4 states
0
0
00
1 cycle/sector, 4 states
00
01
10
11
11
10
0
0
01
PCNTn_TOP
1
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PCNTn_TOP-1
2