EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 106

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.5.10 CMU_CMD - Command Register
11.5.11 CMU_LFCLKSEL - Low Frequency Clock Select Register
2
1
0
31:4
3
2:0
31:4
3:2
Bit
Offset
0x024
Reset
Access
Name
Bit
Offset
0x028
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
HFXOEN
Enables the HFXO.
HFRCODIS
Disables the HFRCO. HFRCOEN has higher priority if written simultaneously. WARNING: Do not disable the HFRCO if this oscillator
is selected as the source for HFCLK.
HFRCOEN
Enables the HFRCO.
Reserved
CALSTART
Starts the calibration, effectively loading the CMU_CALCNT into the down-counter and start decrementing.
HFCLKSEL
Selects the clock source for HFCLK. Note that selecting an oscillator that is disabled will cause the system clock to stop. Check the
status register and confirm that oscillator is ready before switching.
Reserved
LFB
Selects the clock source for LFBCLK
Name
Name
Name
Value
1
2
3
4
Value
0
Mode
HFRCO
HFXO
LFRCO
LFXO
Mode
DISABLED
0
0
0
0
0x0
0x1
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
W1
W1
W1
W1
W1
RW
Access
Access
Access
Description
Select HFRCO as HFCLK
Select HFXO as HFCLK
Select LFRCO as HFCLK
Select LFXO as HFCLK
Description
LFBCLK is disabled
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106
Bit Position
Bit Position
HFXO Enable
HFRCO Disable
HFRCO Enable
Calibration Start
HFCLK Select
Clock Select for LFB
Description
Description
Description
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