EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 419

MCU 32BIT 64KB FLASH 32-QFN

EFM32G200F64

Manufacturer Part Number
EFM32G200F64
Description
MCU 32BIT 64KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets

Specifications of EFM32G200F64

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EFM32G200F64-QFN32
Quantity:
714
29.3.3.5 Waveforms with 1/3 Bias and Triplex Multiplexing
2010-09-06 - d0001_Rev1.00
1/2 bias and triplex multiplexing - LCD_SEG0-LCD_COM1
• DC voltage = 0 (over one frame)
• V
• The LCD display pixel that is connected to LCD_SEG0 and LCD_COM1 will be ON with this waveform
Figure 29.23. LCD 1/2 Bias and Triplex Multiplexing - LCD_SEG0-LCD_COM1
1/2 bias and triplex multiplexing - LCD_SEG0-LCD_COM2
• DC voltage = 0 (over one frame)
• V
• The LCD display pixel that is connected to LCD_SEG0 and LCD_COM2 will be OFF with this waveform
Figure 29.24. LCD 1/2 Bias and Triplex Multiplexing - LCD_SEG0-LCD_COM2
In this mode, each frame is divided into 6 periods. LCD_COM[2:0] lines can be multiplexed with all
segment lines. Figures show 1/3 bias and triplex multiplexing (waveforms show two frames).
Figure 29.25. LCD 1/3 Bias and Triplex Multiplexing - LCD_COM0
Figure 29.26. LCD 1/3 Bias and Triplex Multiplexing - LCD_COM1
RMS
RMS
-V
-V
V
V
V
V
V
V
LC1
LC2
LC1
LC2
LC1
LC1
LC1
LC1
= 0.7 V
= 0.4 × V
-V
-V
V
V
V
V
V
V
V
V
LC0
LC0
(2/3V
(2/3V
(1/3V
(1/3V
LC0
(1/2V
LC0
LC0
(1/2V
LC0
(1/2V
(1/2V
LC3
LC3
LC3
LC3
Fram e Start
Fram e Start
(V
(V
(V
(V
(V
(V
(V
(V
(V
(V
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD_OUT
LCD
LCD
LCD
LCD
SS
SS
SS
SS
Fram e Start
Fram e Start
)
)
)
)
)
LCD_OUT
)
)
)
)
)
)
)
)
)
)
)
)
)
Fram e End
Fram e End
Fram e End
Fram e End
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419
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