EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 138

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

14.4 Register Map
14.5 Register Description
14.5.1 EBI_CTRL - Control Register
31:18
17
16
15:12
11
10
9
8
7:3
2:0
Offset
0x000
0x004
0x008
0x00C
0x010
0x014
Offset
0x000
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
The offset register address is relative to the registers base address.
Reserved
ARDYTODIS
Enables or disables the ARDY timeout functionality. The timeout value is 32 internal clock cycles.
ARDYEN
Enables or disables the ARDY functionality.
Reserved
BANK3EN
This field enables or disables banks 3.
BANK2EN
This field enables or disables banks 2.
BANK1EN
This field enables or disables banks 1.
BANK0EN
This field enables or disables banks 0.
Reserved
MODE
This field sets the access mode the EBI will use for interfacing devices.
Name
Value
0
1
2
Name
EBI_CTRL
EBI_ADDRTIMING
EBI_RDTIMING
EBI_WRTIMING
EBI_POLARITY
EBI_ROUTE
Mode
D8A8
D16A16ALE
D8A24ALE
0
0
0
0
0
0
0x0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
RW
Access
Description
8 bit data, 8 bit address, no latching
16 bit data, 16 bit address, ALE is used for address latching.
8 bit data, 24 bit address, ALE is used for address latching.
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138
Bit Position
Type
RW
RW
RW
RW
RW
RW
ARDY Timeout Disable
ARDY Enable
Bank 3 Enable
Bank 2 Enable
Bank 1 Enable
Bank 0 Enable
Mode
Description
Description
Control Register
Address Timing Register
Read Timing Register
Write Timing Register
Polarity Register
I/O Routing Register
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