EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 353

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19
18:16
15:12
11:8
7:6
5:4
3
Bit
2010-09-06 - d0001_Rev1.00
Reserved
REF
Select reference to ADC single sample mode.
Reserved
INPUTSEL
Select input to ADC single sample mode in either single ended mode or differential mode.
Reserved
RES
Select single sample conversion resolution.
Reserved
Name
Value
7
8
Value
0
1
2
3
4
5
6
DIFF = 0
Mode
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
TEMP
VDDDIV3
VDD
VSS
VREFDIV2
DAC0OUT0
DAC0OUT1
DIFF = 1
Mode
CH0CH1
CH2CH3
CH4CH5
CH6CH7
DIFF0
Value
0
1
2
3
Mode
128CYCLES
256CYCLES
Mode
1V25
2V5
VDD
5VDIFF
EXTSINGLE
2XEXTDIFF
2XVDD
Mode
12BIT
8BIT
6BIT
OVS
Value
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Value
0
1
2
3
4
0x0
0x0
0x0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
Access
Description
128 ADC_CLK cycles acquisition time for single sample
256 ADC_CLK cycles acquisition time for single sample
Description
Internal 1.25 V reference
Internal 2.5 V reference
Buffered VDD
Internal differential 5 V reference
Single ended external reference from pin 6
Differential external reference, 2x(pin 6 - pin 7)
Unbuffered 2xVDD
Description
12-bit resolution
8-bit resolution
6-bit resolution
Oversampling enabled. Oversampling rate is set in OVSRSEL
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353
Single Sample Reference Selection
Single Sample Input Selection
Single Sample Resolution Select
Description
Description
ADCn_CH0
ADCn_CH1
ADCn_CH2
ADCn_CH3
ADCn_CH4
ADCn_CH5
ADCn_CH6
ADCn_CH7
Temperature reference
VDD/3
VDD
VSS
VREF/2
DAC0 output 0
DAC0 output 1
Description
Positive input: ADCn_CH0 Negative input: ADCn_CH1
Positive input: ADCn_CH2 Negative input: ADCn_CH3
Positive input: ADCn_CH4 Negative input: ADCn_CH5
Positive input: ADCn_CH6 Negative input: ADCn_CH7
Differential 0 (Short between positive and negative
inputs)
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