EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 291
EFM32G200F64
Manufacturer Part Number
EFM32G200F64
Description
MCU 32BIT 64KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets
1.EFM32G200F16.pdf
(63 pages)
2.EFM32G200F16.pdf
(10 pages)
3.EFM32G200F16.pdf
(463 pages)
4.EFM32G200F16.pdf
(136 pages)
Specifications of EFM32G200F64
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EFM32G200F16 PDF datasheet
- EFM32G200F16 PDF datasheet #2
- EFM32G200F16 PDF datasheet #3
- EFM32G200F16 PDF datasheet #4
- Current page: 291 of 463
- Download datasheet (8Mb)
21.3.3.3 Clock Source
21.3.3.4 RTC Trigger
2010-09-06 - d0001_Rev1.00
Figure 21.5. LETIMER Double Repeat State Machine
The LETIMER clock source and its prescaler value are defined in the Clock Management Unit (CMU).
The LFACLK
LETIMER Clock Frequency
where the exponent LETIMERn is a 4 bit value in the CMU_LFAPRESC0 register.
To use this module, the LE interface clock must be enabled in CMU_HFCORECLKEN0, in addition to
the module clock.
The LETIMER can be configured to start on compare match events from the Real Time Counter (RTC).
If RTCC0TEN in LETIMERn_CTRL is set, the LETIMER will start on a compare match on RTC compare
channel 0. In the same way, RTCC1TEN in LETIMERn_CTRL enables the LETIMER to start on a
compare match with RTC compare channel 1.
Note
CNT = CNT - 1
CNT = TOP*
The LETIMER can only use compare match events from the RTC if the LETIMER runs
at a higher than or equal frequency than the RTC. Also, if the LETIMER runs at twice the
frequency of the RTC, a compare match event in the RTC will trigger the LETIMER twice.
Four times the frequency gives four consecutive triggers, etc. The LETIMER will only
continue running if triggered while it is running, so the multiple-triggering will only have an
effect if you try to disable the RTC when it is being triggered.
LETIMERn
has a frequency given by Equation 21.1 (p. 291) .
NO
NO
NO
f
LFACKL_LETIMERn
REP0 = = 0
REP1 = = 0
CNT = = 0
START
YES
YES
YES
and
NO
= 32.768/2
...the world's most energy friendly microcontrollers
291
RUNNING
CNT = = 0
REP0 < 2
REP1 < 2
YES
YES
YES
And
LETIMERn
Wait for positive clock edge
NO
If (COMP0TOP)
Else
TOP*
NO
TOP* = COMP0
TOP* = 0xFFFF
CNT = CNT - 1
CNT = TOP*
If (REP0 > 0)
If (REP1 > 0)
STOP = 1
REP0 = 0
REP0 = REP0 - 1
REP1 = REP1 - 1
www.energymicro.com
If (STOP)
Else if (START)
End if
START = 0
STOP = 0
RUNNING = 0
RUNNING = 1
(21.1)
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