EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 445

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

...the world's most energy friendly microcontrollers
QEM in TIMERn_CTRL renamed to QDM.
Changed description of COIST in TIMERn_CCx_CTRL.
Changed DATA0 to CH0DATA and added COMBDATA in PRSEN field description in DACn_CH0CTRL.
Changed DATA1 to CH1DATA and added COMBDATA in PRSEN field description in DACn_CH1CTRL.
Renamed Sine Generation Mode to Sine Generator Mode.
Updated Sine Generator Mode description and added Hi-Z output to Figure 26.3 (p. 366) .
Changed Table 7.1 (p. 28) , Device Information is not writable by software or debug.
Removed ATESTIN option from INPUTSEL in ADCn_SINGLECTRL.
Corrected reset value for PCNTxCLKEN bits in CMU_PCNTCTRL to 0.
30.2 Revision 0.84
February 19th, 2010
EXTIPSEL16 bitfield in GPIO_EXTIPSELH, renamed to EXTIPSEL15.
AAP information moved from MSC to Debug chapter.
Added description of how to read out device revision number to MSC chapter.
Inserted Links from Register Map to Register Description for each module.
Updated DI table and moved to "Memory and Bus System" Section 5.6 (p. 21) .
Updated Section 11.3.3.2 (p. 97) to include information about AUXHFRCO.
EMU_ATESTCTRL register removed.
AUX field in EMU_AUXCTRL renamed to HRCCLR and shrinked to 1 bit.
All DMA channel registers split into separate bit fields.
All PRS channel registers split into separate bit fields.
SINGLEREP in ADCn_SINGLECTRL renamed to REP.
SINGLEDIFF in ADCn_SINGLECTRL renamed to DIFF.
SINGLEADJ in ADCn_SINGLECTRL renamed to ADJ.
SINGLERES in ADCn_SINGLECTRL renamed to RES.
SINGLESEL in ADCn_SINGLECTRL renamed to INPUTSEL.
SINGLEREF in ADCn_SINGLECTRL renamed to REF.
SINGLEAT in ADCn_SINGLECTRL renamed to AT.
SINGLEPRSEN in ADCn_SINGLECTRL renamed to PRSEN.
SINGLEPRSSEL in ADCn_SINGLECTRL renamed to PRSSEL.
SCANREP in ADCn_SCANCTRL renamed to REP.
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2010-09-06 - d0001_Rev1.00
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