EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 311

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

22.3.5 Edge Polarity
22.3.6 PRS Sources
22.3.7 Interrupts
22.3.7.1 Underflow and Overflow Interrupts
22.3.7.2 Direction Change Interrupt
2010-09-06 - d0001_Rev1.00
The edge polarity can be set by configuring the EDGE bit in the PCNTn_CTRL register. When this bit
is cleared, the pulse counter counts positive edges in OVSSINGLE mode and negative edges if the bit
is set.
In EXTCLKQUAD mode, the EDGE bit in PCNTn_CTRL inverts the direction of the counter (which is
automatically detected).
Note
The PCNT module does not generate or receive any PRS events.
The interrupt generated by PCNT uses the PCNTn_INT interrupt vector. Software must read the
PCNTn_IF register to determine which module interrupt that generated the vector invocation.
The underflow interrupt flag (UF) is set when the counter counts down from 0. I.e. when the value of
the counter is 0 and a new pulse is received. The PCNTn_CNT register is loaded with the PCNTn_TOP
value after this event.
The overflow interrupt flag (OF) is set when the counter counts up from the PCNTn_TOP (reload) value.
I.e. if PCNTn_CNT = PCNTn_TOP and a new pulse is received. The PCNTn_CNT register is loaded
with the value 0 after this event.
The PCNTn_PCNT module sets the DIRCNG interrupt flag (PCNTn_IF register) when the direction of
the quadrature code changes. The behavior of this interrupt is illustrated by Figure 22.3 (p. 312) .
The EDGE bit in PCNTn_CTRL has no effect in EXTCLKSINGLE mode.
...the world's most energy friendly microcontrollers
311
www.energymicro.com