EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 299

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

21.5.2 LETIMERn_CMD - Command Register (Async Reg)
10
9
8
7
6
5:4
3:2
1:0
Bit
2010-09-06 - d0001_Rev1.00
For more information about Asynchronous Registers please see Section 5.3 (p. 18) .
RTCC0TEN
Allows the LETIMER to be started on a compare match on RTC compare channel 0.
COMP0TOP
When set, the counter is cleared in the clock cycle after a compare match with compare channel 0.
BUFTOP
Set to load COMP1 into COMP0 when REP0 reaches 0, allowing a buffered top value
OPOL1
Defines the idle value of output 1.
OPOL0
Defines the idle value of output 0.
UFOA1
Defines the action on LETn_O1 on a LETIMER underflow.
UFOA0
Defines the action on LETn_O0 on a LETIMER underflow.
REPMODE
Allows the repeat counter to be enabled and disabled.
Name
Value
0
1
Value
0
1
Value
0
1
Value
0
1
2
3
Value
0
1
2
3
Value
0
1
2
3
Mode
NONE
TOGGLE
PULSE
PWM
Mode
NONE
TOGGLE
PULSE
PWM
Mode
FREE
ONESHOT
BUFFERED
DOUBLE
Description
LETIMER is not affected by RTC compare channel 0
A compare match on RTC compare channel 0 starts the LETIMER if the LETIMER is not already started
Description
The top value of the LETIMER is 65535 (0xFFFF)
The top value of the LETIMER is given by COMP0
Description
COMP0 is only written by software
COMP1 is set to COMP1 when REP0 reaches 0
0
0
0
0
0
0x0
0x0
0x0
Reset
RW
RW
RW
RW
RW
RW
RW
RW
Access
Description
LETn_O1 is held at its idle value as defined by OPOL1.
LETn_O1 is toggled on CNT underflow.
LETn_O1 is held active for one LFACLK
output then returns to its idle value as defined by OPOL1.
LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1
Description
LETn_O0 is held at its idle value as defined by OPOL0.
LETn_O0 is toggled on CNT underflow.
LETn_O0 is held active for one LFACLK
output then returns to its idle value as defined by OPOL0.
LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1
Description
When started, the LETIMER counts down until it is stopped by software.
The counter counts REP0 times. When REP0 reaches zero, the counter stops.
The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when
REP0 reaches zero. Else the counter stops
Both REP0 and REP1 are decremented when the LETIMER wraps around. The
LETIMER counts until both REP0 and REP1 are zero
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RTC Compare 0 Trigger Enable
Compare Value 0 Is Top Value
Buffered Top
Output 1 Polarity
Output 0 Polarity
Underflow Output Action 1
Underflow Output Action 0
Repeat Mode
Description
LETIMER0
LETIMER0
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clock cycle on CNT underflow. The
clock cycle on CNT underflow. The