EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 250

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.3.2.3 Input Capture
19.3.2.3.1 Period/Pulse-Width Capture
2010-09-06 - d0001_Rev1.00
on compare match, overflow and underflow through the CMOA, COFOA and CUFOA fields in
TIMERn_CCx_CTRL. TIMERn_CCx_CCV can be accessed directly or through the buffer register
TIMERn_CCx_CCVB, see Figure 19.12 (p. 250) . When writing to the buffer register, the value in
TIMERn_CCx_CCVB will be written to TIMERn_CCx_CCV on the next update event. This functionality
removes ensures glitch free PWM outputs. The CCVBV flag in TIMERn_STATUS indicates whether the
TIMERn_CCx_CCVB register contains data that have not yet been written to the TIMERn_CCx_CCV
register. Note that when writing 0 to TIMERn_CCx_CCVB the CCV value is updated when the timer
counts from 0 to 1. Thus, the compare match for the next period will not happen until the timer reaches
0 again on the way down.
Figure 19.12. TIMER Output Compare/PWM Buffer Functionality
In Input Capture Mode, the counter value (TIMERn_CNT) can be captured in the Compare/Capture
Register (TIMERn_CCx_CCV), see Figure 19.13 (p. 250) . In this mode, TIMERn_CCx_CCV
is read-only. Together with the Compare/Capture Buffer Register (TIMERn_CCx_CCVB) the
TIMERn_CCx_CCV form a double-buffered capture registers allowing two subsequent capture events
to take place before a read-out is required. The CCPOL bits in TIMERn_STATUS indicate the polarity
the edge that triggered the capture in TIMERn_CCx_CCV.
Figure 19.13. TIMER Input Capture
Period and/or pulse-width capture can be achieved by setting the RISEA field in TIMERn_CTRL to
Clear&Start, and select the wanted input from either external pin or PRS, see Figure 19.14 (p. 251) .
For period capture, the Compare/Capture Channel should then be set to input capture on a rising edge
of the same input signal. To capture a the width of a high pulse, the Compare/Capture Channel should
be set to capture on a falling edge of the input signal. To start the measuring period on either a falling
edge or measure the low pulse-width of a signal, opposite polarities should be chosen.
APB Write (CCB)
APB Write (CC)
Read TIMERn_CCx_CCVB
Update event
TIMERn_CCx_CCVB
TIMERn_CCx_CCV
TIMERn_CNT
Set
Clear
Input
CCV BV
m
z
y
n
Load APB
Load CCB
Load APB
prev. val
CCV B
CCV
prev. val
m
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