EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 286

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

21.3 Functional Description
21.3.1 Timer
21.3.2 Compare Registers
2010-09-06 - d0001_Rev1.00
• Optionally runs during debug
An overview of the LETIMER module is shown in Figure 21.1 (p. 286) . The LETIMER is a
16-bit down-counter with two compare registers, LETIMERn_COMP0 and LETIMERn_COMP1. The
LETIMERn_COMP0 register can optionally act as a top value for the counter. The repeat counter
LETIMERn_REP0 allows the timer to count a specified number of times before it stops. Both the
LETIMERn_COMP0 and LETIMERn_REP0 registers can be double buffered by the LETIMERn_COMP1
and LETIMERn_REP1 registers to allow continuous operation. The timer can generate a single pin
output, or two linked outputs.
Figure 21.1. LETIMER Overview
The timer is started by setting command bit START in LETIMERn_CMD, and stopped by setting the
STOP command bit in the same register. RUNNING in LETIMERn_STATUS is set as long as the timer is
running. The timer can also be started on external signals, such as a compare match from the Real Time
Counter. If START and STOP are set at the same time, STOP has priority, and the timer will be stopped.
The timer value can be read using the LETIMERn_CNT register. The value cannot be written, but it
can be cleared by setting the CLEAR command bit in LETIMERn_CMD. If the CLEAR and START
commands are issued at the same time, the timer will be cleared, then start counting at the top value.
The LETIMER has two compare match registers, LETIMERn_COMP0 and LETIMERn_COMP1.
Each of these compare registers are capable of generating an interrupt when the counter value
• Repeat done
RTC event
LFACLK
SW
LETIMERn
Start
Reload
Written
LETIMER Control
Buffer
Update
(Repeat Buffer)
CNT (Counter)
Stop
(Top Buffer)
and Status
(Repeat)
COMP1
COMP0
REP0
REP1
(Top)
Update
load logic
Top load
Repeat
logic
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286
= 0
= 1
= 1
0
=
=
Control
Control
Pulse
Pulse
COMP1 Match
(COMP1 interrupt flag)
COMP0 Match
(COMP0 interrupt flag)
REP0 Zero
(REP0 interrupt flag)
REP1 Zero
(REP1 interrupt flag)
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Underflow
(UF interrupt flag)
pin
ctrl
pin
ctrl
LETn_O0
LETn_O1