EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 268

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

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Bit
2010-09-06 - d0001_Rev1.00
Reserved
FILT
Enable digital filter.
INSEL
Select Compare/Capture channel input.
Reserved
PRSSEL
Select PRS input channel for Compare/Capture channel.
Reserved
CUFOA
Select output action on counter underflow.
COFOA
Select output action on counter overflow.
CMOA
Select output action on compare match.
Name
Value
0
1
2
3
Value
0
1
Value
0
1
Value
0
1
2
3
4
5
6
7
Value
0
1
2
3
Value
0
1
2
3
Value
0
1
2
Mode
RISING
FALLING
BOTH
NONE
Mode
DISABLE
ENABLE
Mode
PIN
PRS
Mode
PRSCH0
PRSCH1
PRSCH2
PRSCH3
PRSCH4
PRSCH5
PRSCH6
PRSCH7
Mode
NONE
TOGGLE
CLEAR
SET
Mode
NONE
TOGGLE
CLEAR
SET
Mode
NONE
TOGGLE
CLEAR
0
0
0x0
0x0
0x0
0x0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
Access
Description
Rising edges detected
Falling edges detected
Both edges detected
No edge detection, signal is left as it is
Description
Digital filter disabled
Digital filter enabled
Description
TIMERnCCx pin is selected
PRS input (selected by PRSSEL) is selected
Description
PRS Channel 0 selected as input
PRS Channel 1 selected as input
PRS Channel 2 selected as input
PRS Channel 3 selected as input
PRS Channel 4 selected as input
PRS Channel 5 selected as input
PRS Channel 6 selected as input
PRS Channel 7 selected as input
Description
No action on counter underflow
Toggle output on counter underflow
Clear output on counter underflow
Set output on counter underflow
Description
No action on counter overflow
Toggle output on counter overflow
Clear output on counter overflow
Set output on counter overflow
Description
No action on compare match
Toggle output on compare match
Clear output on compare match
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268
Digital Filter
Input Selection
Compare/Capture Channel PRS Input Channel Selection
Counter Underflow Output Action
Counter Overflow Output Action
Compare Match Output Action
Description
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