EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 260

MCU 32BIT 64KB FLASH 32-QFN

EFM32G200F64

Manufacturer Part Number
EFM32G200F64
Description
MCU 32BIT 64KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets

Specifications of EFM32G200F64

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Quantity
Price
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Part Number:
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19.5.2 TIMERn_CMD - Command Register
7
6
5
4
3
2
1:0
31:2
1
Bit
Offset
0x004
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
DMACLRACT
When this bit is set, the DMA requests are cleared when the corresponding DMA channel is active. This enables the timer DMA
requests to be cleared without accessing the timer.
DEBUGRUN
Set this bit to enable timer to run in debug mode.
QDM
This bit sets the mode for the quadrature decoder.
OSMEN
Enable/disable one shot mode.
SYNC
When this bit is set, the Timer is started/stopped/reloaded by start/stop/reload commands in the other timers
Reserved
MODE
These bit set the counting mode for the Timer. Note, when Quadrature Decoder Mode is selected (MODE = 'b11), the CLKSEL is
don't care. The Timer is clocked by the Decoder Mode clock output.
Reserved
STOP
Write a 1 to this bit to stop timer
Name
Name
Value
3
Value
0
1
Value
0
1
Value
0
1
Value
0
1
2
3
Mode
RELOADSTART
Mode
X2
X4
Mode
UP
DOWN
UPDOWN
QDEC
Description
Timer is frozen in debug mode
Timer is running in debug mode
Description
Timer is not started/stopped/reloaded by other timers
Timer is started/stopped/reloaded by other timers
0
0
0
0
0
0x0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
W1
Access
Access
Description
Reload and start counter
Description
X2 mode selected
X4 mode selected
Description
Up-count mode
Down-count mode
Up/down-count mode
Quadrature decoder mode
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Bit Position
DMA Request Clear on Active
Debug Mode Run Enable
Quadrature Decoder Mode Selection
One-shot Mode Enable
Timer Start/Stop/Reload Synchronization
Timer Mode
Stop Timer
Description
Description
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