EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 252

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.3.2.4.1 Frequency Generation (FRG)
19.3.2.5 Pulse-Width Modulation (PWM)
19.3.2.6 Up-count (Single-slope) PWM
2010-09-06 - d0001_Rev1.00
Frequency generation (see Figure 19.17 (p. 252) ) can be achieved in compare mode by:
• Setting the counter in up-count mode
• Enabling buffering of the TOP value.
• Setting the CC channels overflow action to toggle
Figure 19.17. TIMER Up-count Frequency Generation
The output frequency is given by Equation 19.2 (p. 252)
TIMER Up-count Frequency Generation Equation
In PWM mode, TIMERn_CCx_CCV is buffered to avoid glitches in the output. The settings in the
Compare Output Action configuration bits are ignored in PWM mode and PWM generation is only
supported for up-count and up/down-count mode.
If the counter is set to up-count and the Compare/Capture channel is put in PWM mode, single slope
PWM output will be generated (see Figure 19.18 (p. 252) ). In up-count mode the PWM period is TOP
+1 cycles and the PWM output will be high for a number of cycles equal to TIMERn_CCx_CCV. This
means that a constant high output is achieved by setting TIMER_CCx to TOP+1 or higher. The PWM
resolution (in bits) is then given by Equation 19.3 (p. 252) .
Figure 19.18. TIMER Up-count PWM Generation
TIMER Up-count PWM Resolution Equation
The PWM frequency is given by Equation 19.4 (p. 252) :
TIMER Up-count PWM Frequency Equation
TIMERn_CCx_CCV
TIMERn_CCx_CCV
TIMERn_TOP
Com pare m atch
TIMERn_TOP
Buffer update
TIMn_CCx
Overflow
0
0
f
FRG
f
PWM
= f
up/down
HFPERCLK
R
= f
PWM
HFPERCLK
up
/ ( 2^(PRESC + 1) x (TOP + 1) )
= log(TOP+1)/log(2)
/ ( 2^PRESC x (TOP + 1)
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(19.2)
(19.3)
(19.4)