EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 243

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.3 Functional Description
2010-09-06 - d0001_Rev1.00
• Output Compare
• PWM
• Clock sources
• Debug mode
• Interrupts, PRS output and/or DMA request
• Dead-Time Insertion Unit (TIMER0 only)
An overview of the TIMER module is shown in Figure 19.1 (p. 244) . The Timer module consists of
a 16 bit up/down counter with 3 Compare/Capture channels connected to pins TIMn_CC0, TIMn_CC1,
and TIMn_CC2.
• Pulse width measurement
• Two capture registers for each capture channel
• Optional digital noise filtering on capture inputs
• Compare output toggle/pulse on compare match
• Immediate update of compare registers
• Up-count PWM
• Up/down-count PWM
• Predictable initial PWM output state (configured by SW)
• Buffered compare register to ensure glitch-free update of compare values
• HFPERCLK
• External pin
• Peripheral Reflex System
• Configurable to either run or stop when processor is stopped (break)
• Underflow
• Overflow
• Compare/Capture event
• Complementary PWM outputs with programmable dead-time
• Configurable action on fault
• Individual fault sources
• Configuration lock
• Capture on either positive or negative edge
• Capture on both edges
• 10-bit Prescaler
• Dead-time is specified independently for rising and falling edge
• Outputs have configurable polarity
• Outputs can be set inactive individually by software.
• Set outputs inactive
• Clear output
• Tristate output
• One or two PRS signals
• Debugger
• Core lockup
• 10-bit prescaler
• 6-bit time value
• Support for automatic restart
TIMERn
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