EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 220

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.3.4 Data Transmission
18.3.4.1 Transmit Buffer Operation
2010-09-06 - d0001_Rev1.00
The clock divider used in the LEUART is a 12-bit value, with a 7-bit integral part and a 5-bit fractional
part. The baud rate of the LEUART is given by :
LEUART Baud Rate Equation
where fLEUARTn is the clock frequency supplied to the LEUART. The value of LEUARTn_CLKDIV thus
defines the baud rate of the LEUART. The integral part of the divider is right-aligned in the upper 24
bits of LEUARTn_CLKDIV and the fractional part is left-aligned in the lower 8 bits. The divider is thus a
256th of LEUARTn_CLKDIV as seen in the equation.
For a desired baud rate br
LEUART CLKDIV Equation
Table 18.2 (p. 220) lists a set of desired baud rates and the closest baud rates reachable by the
LEUART with a 32.768 kHz clocksource. It also shows the average baud rate error.
Table 18.2. LEUART Baud Rates
Data transmission is initiated by writing data to the transmit buffer using one of the methods described
in Section 18.3.4.1 (p. 220) . When the transmission shift register is empty and ready for new data,
a frame from the transmit buffer is loaded into the shift register, and if the transmitter is enabled,
transmission begins. When the frame has been transmitted, a new frame is loaded into the shift register
if available, and transmission continues. If the transmit buffer is empty, the transmitter goes to an idle
state, waiting for a new frame to become available. Transmission is enabled through the command
register LEUARTn_CMD by setting TXEN, and disabled by setting TXDIS. When the transmitter is
disabled using TXDIS, any ongoing transmission is aborted, and any frame currently being transmitted is
discarded. When disabled, the TX output goes to an idle state, which by default is a high value. Whether
or not the transmitter is enabled at a given time can be read from TXENS in LEUARTn_STATUS.
After a transmission, when there is no more data in the shift register or transmit buffer, the TXC flag in
LEUARTn_STATUS and the TXC interrupt flag in LEUARTn_IF are set, signaling that the transmitter is
idle. The TXC status flag is cleared when a new byte becomes available for transmission, but the TXC
interrupt flag must be cleared by software.
A frame can be loaded into the transmit buffer by writing to LEUARTn_TXDATA or LEUARTn_TXDATAX.
Using LEUARTn_TXDATA allows 8 bits to be written to the buffer. If 9 bit frames are used, the 9th bit
will in that case be set to the value of BIT8DV in LEUARTn_CTRL. To set the 9th bit directly and/or
use transmission control, LEUARTn_TXDATAX must be used. When writing data to the transmit buffer
Desired baud rate
[baud/s]
300
600
1200
2400
4800
9600
LEUARTn_CLKDIV = 256 x (fLEUARTn/br
LEUARTn_CLKDIV
27704
13728
6736
3240
1488
616
br = fLEUARTn/(1 + LEUARTn_CLKDIV/256)
DESIRED
, LEUARTn_CLKDIV can be calculated by using:
LEUARTn_CLKDIV/256
108,21875
53,625
26,3125
12,65625
5,8125
2,40625
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220
DESIRED
Actual baud rate
[baud/s]
300,0217
599,8719
1199,744
2399,487
4809,982
9619,963
- 1)
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Error [%]
0,01
-0,02
-0,02
-0,02
0,21
0,21
(18.1)
(18.2)