EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 110

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.5.16 CMU_IEN - Interrupt Enable Register
11.5.17 CMU_HFCORECLKEN0 - High Frequency Core Clock Enable
Register 0
31:6
5
4
3
2
1
0
31:4
3
2
1
0
Offset
0x03C
Reset
Access
Name
Bit
Offset
0x040
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
Reserved
CALRDY
Set to enable the Calibration Ready Interrupt.
AUXHFRCORDY
Set to enable the AUXHFRCO Ready Interrupt.
LFXORDY
Set to enable the LFXO Ready Interrupt.
LFRCORDY
Set to enable the LFRCO Ready Interrupt.
HFXORDY
Set to enable the HFXO Ready Interrupt.
HFRCORDY
Set to enable the HFRCO Ready Interrupt.
Reserved
EBI
Set to enable the clock for EBI.
LE
Set to enable the clock for LE. Interface used for bus access to Low Energy peripherals.
DMA
Set to enable the clock for DMA.
AES
Set to enable the clock for AES.
Name
Name
0
0
0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Access
Access
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110
Bit Position
Bit Position
Calibration Ready Interrupt Enable
AUXHFRCO Ready Interrupt Enable
LFXO Ready Interrupt Enable
LFRCO Ready Interrupt Enable
HFXO Ready Interrupt Enable
HFRCO Ready Interrupt Enable
External Bus Interface Clock Enable
Low Energy Peripheral Interface Clock Enable
Direct Memory Access Controller Clock Enable
Advanced Encryption Standard Accelerator Clock Enable
Description
Description
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