EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 189

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

16.3.2.9 Collision Detection
16.3.2.10 SmartCard Mode
2010-09-06 - d0001_Rev1.00
MPAF interrupt flag in USARTn_IF is set, and the address frame is loaded into the receive register. This
happens regardless of the value of RXBLOCK in USARTn_STATUS.
Multi-processor mode is enabled by setting MPM in USARTn_CTRL, and the value of the 9th bit in
address frames can be set in MPAB. Note that the receiver must be enabled for address frames to be
detected. The receiver can be blocked however, preventing data from being loaded into the receive
buffer while looking for address frames.
Example 16.1 (p. 189) explains basic usage of the multi-processor mode:
Example 16.1. USART Multi-processor Mode Example
1. All slaves enable multi-processor mode and, enable and block the receiver. They will now not receive
2. The master sends a frame containing the address of a slave and with the 9th bit set
3. All slaves receive the address frame and get an interrupt. They can read the address from the receive
4. The master sends data with the 9th bit cleared
5. Only the slave with RX enabled receives the data. When transmission is complete, the slave blocks
When a slave has received an address frame and wants to receive the following data, it must make
sure the receiver is unblocked before the next frame has been completely received in order to prevent
data loss.
BIT8DV in USARTn_CTRL can be used to specify the value of the 9th bit without writing to the transmit
buffer with USARTn_TXDATAX or USARTn_TXDOUBLEX, giving higher efficiency in multi-processor
mode, as the 9th bit is only set when writing address frames, and 8-bit writes to the USART can be used
when writing the data frames.
The USART supports a basic form of collision detection. When the receiver is connected to the output
of the transmitter, either by using the LOOPBK bit in USARTn_CTRL or through an external connection,
this feature can be used to detect whether data transmitted on the bus by the USART did get corrupted
by a simultaneous transmission by another device on the bus.
For collision detection to be enabled, CCEN in USARTn_CTRL must be set, and the receiver enabled.
The data sampled by the receiver is then continuously compared with the data output by the transmitter.
If they differ, the CCF interrupt flag in USARTn_IF is set. The collision check includes all bits of the
transmitted frames. The CCF interrupt flag is set once for each bit sampled by the receiver that differs
from the bit output by the transmitter. When the transmitter output is disabled, i.e. the transmitter is
tristated, collisions are not registered.
In SmartCard mode, the USART supports the ISO 7816 I/O line T0 mode. With exception of the stop-
bits (guard time), the 7816 data frame is equal to the regular asynchronous frame. In this mode, the
receiver pulls the line low for one baud, half a baud into the guard time to indicate a parity error. This
NAK can for instance be used by the transmitter to re-transmit the frame. SmartCard mode is a half
duplex asynchronous mode, so the transmitter must be tristated whenever not transmitting data.
To enable SmartCard mode, set SCMODE in USARTn_CTRL, set the number of databits in a frame to
8, and configure the number of stopbits to 1.5 by writing to STOPBITS in USARTn_FRAME.
The SmartCard mode relies on half duplex communication on a single line, so for it to work, both the
receiver and transmitter must work on the same line. This can be achieved by setting LOOPBK in
data unless it is an address frame. MPAB in USARTn_CTRL is set to identify frames with the 9th bit
high as address frames.
buffer. The selected slave unblocks the receiver to start receiving data from the master.
the receiver and waits for a new address frame.
...the world's most energy friendly microcontrollers
189
www.energymicro.com