EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 209

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

16.5.16 USARTn_TXDOUBLE - TX Buffer Double Data Register
16.5.17 USARTn_IF - Interrupt Flag Register
31:16
15:8
7:0
31:13
12
11
10
9
8
7
6
5
4
Offset
0x03C
Reset
Access
Name
Bit
Offset
0x040
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
Reserved
TXDATA1
Second frame to write to buffer.
TXDATA0
First frame to write to buffer.
Reserved
CCF
Set when a collision check notices an error in the transmitted data.
SSM
Set when the device is selected as a slave when in master mode.
MPAF
Set when a multi-processor address frame is detected.
FERR
Set when a frame with a framing error is received while RXBLOCK is cleared.
PERR
Set when a frame with a parity error (asynchronous mode only) is received while RXBLOCK is cleared.
TXUF
Set when operating as a synchronous slave, no data is available in the transmit buffer when the master starts transmission of a
new frame.
TXOF
Set when a write is done to the transmit buffer while it is full. The data already in the transmit buffer is preserved.
RXUF
Set when trying to read from the receive buffer when it is empty.
RXOF
Name
Name
0x00
0x00
0
0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
W
W
R
R
R
R
R
R
R
R
R
Access
Access
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209
Bit Position
Bit Position
TX Data
TX Data
Collision Check Fail Interrupt Flag
Slave-Select In Master Mode Interrupt Flag
Multi-Processor Address Frame Interrupt Flag
Framing Error Interrupt Flag
Parity Error Interrupt Flag
TX Underflow Interrupt Flag
TX Overflow Interrupt Flag
RX Underflow Interrupt Flag
RX Overflow Interrupt Flag
Description
Description
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