EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 49

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2010-09-06 - d0001_Rev1.00
1
that you must configure the alternate data structure.
See Section 8.4.3.3 (p. 53) for more information.
Figure 8.5 (p. 49) shows a peripheral scatter-gather example.
Figure 8.5. Peripheral scatter-gather example
In Figure 8.5 (p. 49) :
Initialization
The peripheral scatter-gather transaction commences when the controller receives a request on
dma_req[ ]. The transaction continues as follows:
Initialization:
Peripheral scatter-gather transaction:
Because the R_power field is set to four, you must set N to be a multiple of four. The value given by N/4 is the number of times
Bit
[13:4]
[3]
Request
Data for Task A
Data for Task B
Data for Task C
Data for Task D
1. Configure prim ary to enable the copy A, B, C, and D operations: cycle_ctrl = b110, 2
2. Write the prim ary source data in m em ory, using the structure shown in the following table.
Field
n_minus_1
next_useburst
m em ory, to Alternate
m em ory, to Alternate
m em ory, to Alternate
m em ory, to Alternate
Copy from A in
Copy from B in
Copy from C in
Copy from D in
Pr im a r y
src_data_end_ptr
0x0A000000
0x0B000000
0x0C000000
0x0D000000
1. The host processor configures the primary data structure to operate in peripheral
2. The host processor writes the data structure for tasks A, B, C, and D to the
3. The host processor enables the channel.
Value
N
-
1
scatter-gather mode by setting cycle_ctrl to b110. Because a data structure for a
single channel consists of four words then you must set 2
there are four tasks and therefore N is set to 16.
memory locations that the primary src_data_end_ptr specifies.
Request
Request
Request
Request
Request
Request
Description
Configures the controller to perform N DMA transfers, where N is a multiple of four
When set to 1, the controller sets the chnl_useburst_set [C] bit to 1 after the
alternate transfer completes
dst_data_end_ptr
0x0AE00000
0x0BE00000
0x0CE00000
0x0DE00000
Alt e r n a t e
Task C
Task D
Task A
Task B
channel_cfg
cycle_ctrl = b111, 2
cycle_ctrl = b111, 2
cycle_ctrl = b111, 2
cycle_ctrl = b001, 2
alternate channel control data structure
For all prim ary to alternate transitions,
...the world's most energy friendly microcontrollers
N = 3, 2
N = 8, 2
N = 5, 2
N = 4, 2
arbitration process and im m ediately
perform s the DMA transfer that the
the controller does not enter the
49
R
R
R
R
R
R
R
R
= 4, N = 3
= 2, N = 8
= 8, N = 5
= 4, N = 4
= 4
= 2
= 8
= 4
specifies.
Unused
0xXXXXXXXX
0xXXXXXXXX
0xXXXXXXXX
0xXXXXXXXX
dm a _don e [ C]
R
= 4, N = 16.
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R
to 4. In this example,