EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 296

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

21.3.5.3 PWM Output
21.3.5.4 Interrupts
2010-09-06 - d0001_Rev1.00
Figure 21.11 (p. 296) shows an example where the LETIMER is started while LETIMERn_CNT is
nonzero. In this case the length of the first repetition is given by the value in LETIMERn_CNT.
Figure 21.11. LETIMER LETIMERn_CNT Not Initialized to 0
Example 21.3. LETIMER PWM Output
There are several ways of generating PWM output with the LETIMER, but the most straight-forward way
is using the PWM output mode. This mode is enabled by setting UFOA0 or OFUA1 in LETIMERn_CTRL
to 3. In PWM mode, the output is set idle on timer underflow, and active on LETIMERn_COMP1 match,
so if for instance COMP0TOP = 1 and OPOL0 = 0 in LETIMERn_CTRL, LETIMERn_COMP0 determines
the PWM period, and LETIMERn_LETIMERn_COMP1 determines the active period.
The PWM period in PWM mode is LETIMERn_COMP0 + 1. There is no special handling of the case
where LETIMERn_COMP1 > LETIMERn_COMP0, so if LETIMERn_COMP1 > LETIMERn_COMP0, the
PWM output is given by the idle output value. This means that for OPOLx = 0 in LETIMERn_CTRL, the
PWM output will always be 0 for at least one clock cycle, and for OPOLx = 1 LETIMERn_CTRL, the
PWM output will always be 1 for at least one clock cycle.
To generate a PWM signal using the full PWM range, invert OPOLx when LETIMERn_COMP1 is set
to a value larger than LETIMERn_COMP0.
Example 21.4. LETIMER PWM Output
The interrupts generated by the LETIMER are combined into one interrupt vector. If the interrupt for the
LETIMER is enabled, an interrupt will be made if one or more of the interrupt flags in LETIMERn_IF and
their corresponding bits in LETIMER_IEN are set.
LFACLK
UFOA0 = 01
UFOA0 = 10
Int. flags set
LETn_O0
LETn_O1
LETIMERn
TOP1
TOP0
REP0
REP1
Initial configuration,
Multiple LETIMER cycles are required to write a value to the LETIMER registers. The
example in Figure 21.10 (p. 295) assumes that writes are done in advance so they arrive
in the LETIMER as described in the figure.
CNT
REP1 just written
3
3
2
4
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3
3
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UFIF
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UFIF
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1
1
3
REP0IF
UFIF
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3 3
296
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UFIF
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final values
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REP0IF
u
UFIF
Stop,
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