EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 230

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13
12
11
10
9
8
7
6
5
4
Bit
2010-09-06 - d0001_Rev1.00
TXDMAWU
Set to wake the DMA controller up when in EM2 and space is available in the transmit buffer.
RXDMAWU
Set to wake the DMA controller up when in EM2 and data is available in the receive buffer.
BIT8DV
When 9-bit frames are transmitted, the default value of the 9th bit is given by BIT8DV. If TXDATA is used to write a frame, then the
value of BIT8DV is assigned to the 9th bit of the outgoing frame. If a frame is written with TXDATAX however, the default value is
overridden by the written value.
MPAB
Defines the value of the multi-processor address bit. An incoming frame with its 9th bit equal to the value of this bit marks the frame
as a multi-processor address frame.
MPM
Set to enable multi-processor mode.
SFUBRX
Clears RXBLOCK when the start-frame is found in the incoming data. The start-frame is loaded into the receive buffer.
LOOPBK
Set to connect receiver to LEUn_TX instead of LEUn_RX.
ERRSDMA
When set,RX DMA requests will be cleared on framing and parity errors.
INV
Set to invert the output on LEUn_TX and input on LEUn_RX.
STOPBITS
Determines the number of stop-bits used. Only used when transmitting data. The receiver only verifies that one stop bit is present.
Name
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Mode
ONE
TWO
Description
While in EM2, the DMA controller will not get requests about space being available in the transmit buffer
DMA is available in EM2 for the request about space available in the transmit buffer
Description
While in EM2, the DMA controller will not get requests about data being available in the receive buffer
DMA is available in EM2 for the request about data in the receive buffer
Description
The 9th bit of incoming frames have no special function
An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and
will result in the MPAB interrupt flag being set
Description
Detected start-frames have no effect on RXBLOCK
When a start-frame is detected, RXBLOCK is cleared and the start-frame is loaded into the receive buffer
Description
The receiver is connected to and receives data from LEUn_RX
The receiver is connected to and receives data from LEUn_TX
Description
Framing and parity errors have no effect on DMA requests from the LEUART
RX DMA requests from the LEUART are disabled if a framing error or parity error occurs.
Description
A high value on the input/output is 1, and a low value is 0.
A low value on the input/output is 0, and a high value is 0.
0
0
0
0
0
0
0
0
0
0
Reset
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Access
Description
One stop-bit is transmitted with every frame
Two stop-bits are transmitted with every frame
...the world's most energy friendly microcontrollers
230
TX DMA Wakeup
RX DMA Wakeup
Bit 8 Default Value
Multi-Processor Address-Bit
Multi-Processor Mode
Start-Frame UnBlock RX
Loopback Enable
Clear RX DMA On Error
Invert Input And Output
Stop-Bit Mode
Description
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