HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 87

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
2.5.2
Table 2.2 shows addressing modes and effective address calculation methods.
Table 2.2
Addressing
Mode
Register
direct
Register
indirect
Register
indirect with
post-increment
Register
indirect with
pre-decrement
Addressing Modes
Addressing Modes and Effective Addresses
Instruction
Format
Rn
@Rn
@Rn+
@–Rn
Effective Address Calculation Method
Effective address is register Rn.
(Operand is register Rn contents.)
Effective address is register Rn contents.
Effective address is register Rn contents. A
constant is added to Rn after instruction
execution: 1 for a byte operand, 2 for a word
operand, or 4 for a longword operand.
Effective address is register Rn contents,
decremented by a constant beforehand: 1
for a byte operand, 2 for a word operand, or
4 for a longword operand.
1/2/4
1/2/4
Rn
Rn
Rn
Rn + 1/2/4
Rn - 1/2/4
+
Rn 1/2/4
Rn
Rn
Rev. 1.00, 02/04, page 49 of 804
Calculation Formula
Rn
Rn
After instruction
execution
Byte: Rn + 1 → Rn
Word: Rn + 2 → Rn
Longword: Rn + 4 → Rn
Byte: Rn – 1 → Rn
Word: Rn – 2 → Rn
Longword: Rn – 4 → Rn
(Instruction executed with
Rn after calculation)

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