HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 487

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

16.3.7
SCFER is a 16-bit read-only register that indicates the number of receive errors (framing or parity
error).
Bit
15, 14 
13
12
11
10
9
8
7, 6
5
4
3
2
1
0
Bit Name
PER5
PER4
PER3
PER2
PER1
PER0

FER5
FER4
FER3
FER2
FER1
FER0
FIFO Error Count Register (SCFER)
Initial
Value
All 0
0
0
0
0
0
0
All 0
0
0
0
0
0
0
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Description
Reserved
These bits are always read as 0.
Parity Error Count
Indicates the number of data, in which parity errors are
generated, in receive data stored in the receive FIFO data
register (SCFRDR) in asynchronous mode.
After setting the ER bit in SCSSR, the value of bits 13 to 8
indicates the number of parity error generated data.
When all 64 bytes of receive data in SCFRDR have parity
errors, the PER5 to PER0 bits indicate 0.
Reserved
These bits are always read as 0.
Framing Error Count
Indicates the number of data, in which framing errors are
generated, in receive data stored in the receive FIFO data
register (SCFRDR) in asynchronous mode.
After setting the ER bit in SCSSR, the value of bits 5 to 0
indicates the number of framing error generated data.
When all 64 bytes of receive data in SCFRDR have framing
errors, the FER5 to FER0 bits indicate 0.
Rev. 1.00, 02/04, page 449 of 804