HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 569

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
19.3.15 HcFmRemaining Register (HFRR)
HFRR is a 14-bit down counter indicating the bit time remaining in the current frame.
Bit
31
30 to 14 —
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
FRT
FR13
FR12
FR11
FR10
FR9
FR8
FR7
FR6
FR5
FR4
FR3
FR2
FR1
FR0
Initial
Value
0
All 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Description
Frame Remaining Toggle
This bit is always loaded from the FIT bit in the
HcFmInterval register when the FR bits reach 0. This bit
is used by the host controller driver for synchronization
between the FrameInterval and FrameRemaining
registers.
Reserved
These bits are always read as 0. The write value should
always be 0. The operation is not guaranteed if 1 is
written to these bits.
Frame Remaining
These counters are decremented at each bit time. When
these counters reach 0, these counters are reset by
loading the value of the Frame Interval bit specified in the
HcFmInterval register at the next bit time boundary.
When the host controller transits to the USB Operational
state, it reads the FI bits in the HcFmInterval register
again and uses the updated value from the next SOF.
Rev. 1.00, 02/04, page 531 of 804

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