HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 503

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Clock: Either an internal clock generated by the on-chip baud rate generator or an external clock
input at the SCK pin can be selected as the serial clock for the SCIF, according to the setting of the
CKE1 and CKE0 bits in SCSCR.
When an external clock is input at the SCK pin, a clock must be input according to the sampling
rate. For example, when the sampling rate is 1/16, a clock with a frequency of 8 times the bit rate
must be input.
Data Transfer Operations:
1. SCIF Initialization
Before transmitting and receiving data, it is necessary to clear the TE and RE bits in SCSCR to
0, then initialize the SCIF as described below.
When the transfer format, etc., is changed, the TE and RE bits must be cleared to 0 before
making the change using the following procedure. When the TE bit is cleared to 0, the transmit
shift register (SCTSR) is initialized. Note that clearing the TE and RE bits to 0 does not change
the contents of SCSSR, SCFTDR, or SCFRDR. The TE bit should be cleared to 0 after all
transmit data has been sent and the TEND bit in SCSSR has been set to 1. Clearing to 0 can
also be performed during transmission, but the data being transmitted will go to the high-
impedance state after the clearance. Before setting TE to 1 again to start transmission, the
TFRST bit in SCFCR should first be set to 1 to reset SCFTDR.
When an external clock is used, the clock should not be stopped during operation, including
initialization, since operation will be unreliable in this case.
Rev. 1.00, 02/04, page 465 of 804

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