HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 343

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

11
10
9
8
Bit
7
6
RS3
RS2
RS1
RS0
Bit Name
DL
DS
0
0
0
0
Initial
Value
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Resource Select
RS3 to RS0 specify which transfer requests will be sent to
the DMAC. The changing of transfer request source should
be done in the state that DMA enable bit (DE) is set to 0.
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1
Note: External request specification is valid only in
Descriptions
DREQ Level (DL) and DREQ Edge Select (DS)
These bits specify the sampling method of the DREQ pin
input and the sampling level.
These bits are valid only in CHCR_0. These bits are
reserved in CHCR_1 to CHCR_3. The write value should
always be 0. If 1 is written to these bits, correct operation
cannot be guaranteed.
In channel 0, also, if the transfer request source is specified
as an on-chip peripheral module or if an auto-request is
specified, the specification by this bit is ignored.
00: DREQ detected in low level
01: DREQ detected at falling edge
10: DREQ detected in high level
11: DREQ detected at rising edge
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
CHCR_0; not valid in CHCR_1 to CHCR_3.
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
External request, dual address mode
Setting
External request / Single address mode
External address space → external device with DACK
External request / Single address mode
External device with DACK → external address space
Auto request
Setting
Setting
Setting
DMA expansion request module selection specification
Setting
Setting Prohibited
Setting Prohibited
Setting Prohibited
Setting Prohibited
Setting Prohibited
Setting Prohibited
prohibited
prohibited
prohibited
prohibited
prohibited
Rev. 1.00, 02/04, page 305 of 804