HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 604

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

20.3.4
EPDR0i is a 64-byte 8-bit transmit FIFO buffer for endpoint 0. EPDR0i holds one packet of
transmit data for control-in. Transmit data is fixed by writing one packet of data and setting
EP0iPKTE in TRG. When an ACK handshake is returned from the host after the data has been
transmitted, EP0iTS in IFR0 is set. This FIFO buffer can be initialized by means of EP0iCLR in
FCLR.
Rev. 1.00, 02/04, page 566 of 804
Bit
4
3
2
1
0
Bit
7 to 0
Bit Name
EP1 TR IE
EP1 TS IE
EP0o TS IE
EP0i TR IE
EP0i TS IE
Bit Name
D7 to D0
EP0i Data Register (EPDR0i)
Initial
Value
0
0
0
0
0
Initial Value
Undefined
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
Description
EP1 TR Interrupt Enable
0: Disables an EP1 TR (transfer request) interrupt
1: Enables an EP1 TR (transfer request) interrupt
EP1 TS Interrupt Enable
0: Disables an EP1 TS (receive complete) interrupt
1: Enables an EP1 TS (receive complete) interrupt
EP0o TS Interrupt Enable
0: Disables an EP0o TS (receive complete) interrupt
1: Enables an EP0o TS (receive complete) interrupt
EP0i TR Interrupt Enable
0: Disables an EP0i TR (transfer request) interrupt
1: Enables an EP0i TR (transfer request) interrupt
EP0i TS Interrupt Enable
0: Disables an EP0i TS (receive complete) interrupt
1: Enables an EP0i TS (receive complete) interrupt
request
request
request
request
request
request
request
request
request
request
Description
Data register for control-in transfer