HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 26

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Power-Down Modes
Figure 13.1 Canceling Standby Mode with STBCR.STBY........................................................ 368
Figure 13.2 Transitions between Modes..................................................................................... 369
Section 14 Timer Unit (TMU)
Figure 14.1 TMU Block Diagram .............................................................................................. 372
Figure 14.2 Setting Count Operation.......................................................................................... 377
Figure 14.3 Auto-Reload Count Operation................................................................................. 378
Figure 14.4 Count Timing when Internal Clock Is Operating .................................................... 378
Figure 14.5 UNF Set Timing ...................................................................................................... 379
Figure 14.6 Status Flag Clear Timing......................................................................................... 379
Section 15 Serial I/O with FIFO (SIOF)
Figure 15.1 Block Diagram of SIOF .......................................................................................... 382
Figure 15.2 Serial Clock Supply................................................................................................. 410
Figure 15.3 Serial Data Synchronization Timing ....................................................................... 411
Figure 15.4 SIOF Transmit/Receive Timing .............................................................................. 412
Figure 15.5 Transmit/Receive Data Bit Alignment .................................................................... 414
Figure 15.6 Control Data Bit Alignment .................................................................................... 415
Figure 15.7 Control Data Interface (Slot Position)..................................................................... 416
Figure 15.8 Control Data Interface (Secondary FS) ................................................................... 417
Figure 15.9 Example of Transmit Operation in Master Mode.................................................... 419
Figure 15.10 Example of Receive Operation in Master Mode ................................................... 420
Figure 15.11 Example of Transmit Operation in Slave Mode .................................................... 421
Figure 15.12 Example of Receive Operation in Slave Mode ..................................................... 422
Figure 15.13 Transmit and Receive Timing (8-Bit Monaural Data (1))..................................... 426
Figure 15.14 Transmit and Receive Timing (8-Bit Monaural Data (2))..................................... 426
Figure 15.15 Transmit and Receive Timing (16-Bit Monaural Data (1))................................... 427
Figure 15.16 Transmit and Receive Timing (16-Bit Stereo Data (1)) ........................................ 427
Figure 15.17 Transmit and Receive Timing (16-Bit Stereo Data (2)) ........................................ 428
Figure 15.18 Transmit and Receive Timing (16-Bit Stereo Data (3)) ........................................ 428
Figure 15.19 Transmit and Receive Timing (16-Bit Stereo Data (4)) ........................................ 429
Figure 15.20 Transmit and Receive Timing (16-Bit Stereo Data).............................................. 429
Figure 15.21 Example of Configuration in SPI Mode ................................................................ 430
Figure 15.22 SPI Data/Clock Timing 1 (CPHA = 0).................................................................. 432
Figure 15.23 SPI Data/Clock Timing 2 (CPHA = 1).................................................................. 432
Section 16 Serial Communication Interface with FIFO (SCIF)
Figure 16.1 Block Diagram of SCIF........................................................................................... 437
Figure 16.2 Sample SCIF Initialization Flowchart ..................................................................... 466
Figure 16.3 Sample Serial Transmission Flowchart ................................................................... 467
Figure 16.4 Example of Transmit Operation
(Example with 8-Bit Data, Parity, One Stop Bit) .................................................... 469
Figure 16.5 Example of Transmit Data Stop Function ............................................................... 469
Rev. 1.00, 02/04, page xxvi of xxxviii