HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 265

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

9.4.2
CSnBCR is a 32-bit readable/writable register that specifies the memory to be connected to each
area, the number of idle cycles between bus cycles, and the bus-width.
CSnBCR is initialized by a power-on reset, but not by a manual reset or in standby mode and
holds the previous value. Do not access external memory other than area 0 until CSnBCR register
initialization is completed.
Bit
31
30
29
28
27
26
25
Bit Name

IWW1
IWW0

IWRWD1
IWRWD0
CSn Space Bus Control Register (CSnBCR) (n=0, 3, 4)
Initial
Value
All 0
1
1
0
1
1
R/W Description
R
R/W
R/W
R
R/W
R/W
Reserved
This bit is always read as 0. The write value should always
be 0. If 1 is written to these bits, correct operation cannot be
guaranteed.
Idle Cycles between Write-read Cycles and Write-write
Cycles*
These bits specify the number of idle cycles to be inserted
after the access to a memory that is connected to the space.
The target access cycles are the write-read cycle and write-
write cycle.
00: No idle cycle inserted
01: 1 idle cycle inserted
10: 2 idle cycles inserted
11: 4 idle cycles inserted
Reserved
This bit is always read as 0. The write value should always
be 0. If 1 is written to these bits, correct operation cannot be
guaranteed.
Idle Cycles for Another Space Read-Write*
Specify the number of idle cycles to be inserted after the
access to a memory that is connected to the space. The
target access cycle is a read-write one in which continuous
accesses switch between different spaces.
00: No idle cycle inserted
01: 1 idle cycle inserted
10: 2 idle cycles inserted
11: 4 idle cycles inserted
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Rev. 1.00, 02/04, page 227 of 804
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