HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 223

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
5.3.5
When the U bit of the entry to be replaced in write-back mode is 1, the entry must be written back
to the external memory. To increase performance, the entry to be replaced is first transferred to the
write-back buffer and fetching of new entries to the cache takes priority over writing back to the
external memory. After the fetching of new entries to the cache completes, the write-back buffer
writes the entry back to the external memory. During the write-back cycles, the cache can be
accessed. The write-back buffer can hold one line of cache data (16 bytes) and its physical
address. Figure 5.3 shows the configuration of the write-back buffer.
5.3.6
Use software to ensure coherency between the cache and the external memory. When memory
shared by this LSI and another device is placed in an address space to which caching applies, use
the memory-mapped cache to make the data invalid and written back, as required. Memory that is
shared by this LSI’s CPU and DMAC should also be handled in this way.
Write-Back Buffer
Coherency of Cache and External Memory
PA (31 to 4):
Longword 0 to 3:
PA (31 to 4)
Figure 5.3 Write-Back Buffer Configuration
Longword 0 Longword 1 Longword 2 Longword 3
Physical address written to external memory
One line of cache data to be written to external
memory
Rev. 1.00, 02/04, page 185 of 804

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