HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 632

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

20.4.5
EP2i has two 64-byte FIFOs, but the user can perform data transmission and transmit data writes
without being aware of this dual-FIFO configuration. However, one data write is performed for
one FIFO. For example, even if both FIFOs are empty, it is not possible to perform EP2i/PKTE at
one time after consecutively writing 128 bytes of data. EP2i/PKTE must be performed for each
64-byte write.
When performing bulk-in transfer, as there is no valid data in the FIFOs on reception of the first
IN token, an IFR0/EP2i TR interrupt is requested. With this interrupt, 1 is written to the
IER0/EP2i EMPTY IE bit, and the EP2i FIFO empty interrupt is enabled. At first, both EP2i
FIFOs are empty, and so an EP2i FIFO empty interrupt is generated immediately.
Rev. 1.00, 02/04, page 594 of 804
EP2i, 5 Bulk-In Transfer (Dual FIFOs)
Data transmission to host
Clear EP2i empty status
(IFR0/EP2i EMPTY = 0)
IN token reception
in EP2i FIFO?
in EP2i FIFO?
Valid data
Space
Figure 20.13 EP2 Bulk-In Transfer Operation
Yes
No
ACK
USB function
No
Yes
NACK
empty status
EMPTY = 1)
(IFR0/EP2i
Set EP2i
Interrupt request
Interrupt
request
(IER0/EP2i EMPTY IE = 1)
Write one packet of data
Write 1 to EP2i packet
(TRG/EP2i PKTE = 1)
to EP2i data register
Clear EP2i transfer
(IFR0/EP2i TR = 0)
Application
IFR0/EP2i EMPTY
Enable EP2i FIFO
empty interrupt
request flag
enable bit
(EPDR2i)
interrupt