HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 696

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

25.2.2
BAMRA is a 32-bit readable/writable register. BAMRA specifies bits masked in the break address
specified by BARA.
25.2.3
BBRA is a 16-bit readable/writable register, which specifies (1) L bus cycle or I bus cycle, (2)
instruction fetch or data access, (3) read or write, and (4) operand size in the break conditions of
channel A.
Rev. 1.00, 02/04, page 658 of 804
Bit
31 to 0 BAMA31 to BAMA0 All 0
Bit
15 to 8 
7
6
Bit Name
Bit Name
CDA1
CDA0
Break Bus Cycle Register A (BBRA)
Break Address Mask Register A (BAMRA)
Initial
Value
All 0
0
0
Initial
Value R/W Description
R/W Break Address Mask A
R/W Description
R
R/W
R/W
Reserved
These bits are always read as 0. The write value
should always be 0. If 1 is written to these bits, correct
operation cannot be guaranteed.
L Bus Cycle/I Bus Cycle Select A
Select the L bus cycle or I bus cycle as the bus cycle
of the channel A break condition.
00: Condition comparison is not performed
01: The break condition is the L bus cycle
10: The break condition is the I bus cycle
11: The break condition is the L bus cycle
Specify bits masked in the channel A break address
bits specified by BARA (BAA31 to BAA0).
0: Break address bit BAAn of channel A is included in
the break condition
1: Break address bit BAAn of channel A is masked and
is not included in the break condition
Note: n = 31 to 0