HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 470

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Serial Clock Timing: Timing on the data and clock lines in SPI mode is shown in figures 15.22
and 15.23. The user can select from four serial transfer formats, which differ according to the
phase and polarity of the serial clock.
Rev. 1.00, 02/04, page 432 of 804
SCK
(CPOL = 0)
(CPOL = 1)
Sampling
MISO/MOSI
SSn
Ts: The setup time for the SCK edge. The minimum value is 0. The setting is made by the SSAST1 and
Th: The hold time for the SCK edge. The minimum value is 1/2 of the period of the SCK.
Td: The idle time. A number of SCK-clock cycles from 0 to 3 is set by the FLD1 and FLD0 bits in SPICR.
SCK
(CPOL = 0)
(CPOL = 1)
Sampling
MISO/MOSI
SSn
Ts: The setup time for the SCK edge. The minimum value is 1/2 of the period of the SCK. The setting is
Th: The hold time for the SCK edge. The minimum value is 0.
Td: The idle time. A number of SCK-clock cycles from 0 to 3 is set by the FLD1 and FLD0 bits in SPICR.
SSAST0 bits in SPICR.
made by the SSAST1 and SSAST0 bits in SPICR.
Figure 15.22 SPI Data/Clock Timing 1 (CPHA = 0)
Figure 15.23 SPI Data/Clock Timing 2 (CPHA = 1)
Ts
Ts
MSB
MSB
Bit 6
Bit 6
Bit 5
Bit 5
Bit 4
Bit 4
Bit 3
Bit 3
Bit 2
Bit 2
Bit 1
Bit 1
LSB
LSB
Th
Th
Td
Td