HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 61

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Classification
System control
Interrupts
Address bus
Data bus
Bus control
Symbol
RESETP
BOOT_E
BREQ
BACK
NMI
IRQ4 to IRQ2,
IRQ0
IRQOUT
A23 to A0
D15 to D0
CS0, CS3, CS4 Output
RD
RD/WR
BS
WE1
I/O
Input
Input
Input
Output
Input
Input
Output
Output
I/O
Output
Output
Output
Output
Name
Power-on reset When this pin goes low, the system
Boot control
Bus mastership
request
Bus mastership
request
acknowledge
Nonmaskable
interrupt request
Interrupt
requests
4 to 2, 0
Bus mastership
request
Address bus
Data bus
Chip select
0, 3, 4
Read
Read/write
Bus start
Write upper bits Indicates that bits 15 to 8 of the
Function
enters the power-on reset state.
Boot mode enable control input.
When this pin goes low at a power-
on reset, the system enters the
boot mode and runs the boot
loader after reset processing.
When this pin goes high at a
power-on reset, the normal reset
sequence is executed.
This pin is set to low when an
external device requests the bus
mastership release.
Indicates that bus mastership is
externally released. A device which
has output the BREQ signal knows
that the bus mastership is acquired
by receiving the BACK signal.
Nonmaskable interrupt request pin.
This pin should be fixed to high
when not in use.
Maskable interrupt request pins.
Selectable as level input or edge
input. The rising edge, falling edge,
and both edges are selectable as
edges.
Notifies an external device of
interrupt source occurrence.
Outputs addresses.
16-bit bidirectional bus
Chip select signal for external
memory or devices
Indicates reading of data from
external devices.
Read/write signal pin
Bus cycle start signal pin
data in the external memory or
device are being written.
Rev. 1.00, 02/04, page 23 of 804

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