HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 245

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
8.3.4
ICR2 is a 16-bit register that specifies the detection mode for the external interrupt input pin
IRQ7: rising edge, falling edge, high level, or low level.
Bit
15 to 4
3
2
1
0
Interrupt Control Register 2 (ICR2)
Bit Name
IRQ71S
IRQ70S
Initial
Value
All 0
0
0
All 0
R/W
R
R/W
R/W
R
Description
Reserved
This bit is always read as 0. The write value should
always be 0. If 1 is written to these bits, correct
operation cannot be guaranteed.
IRQ7 Sense Select
These bits select whether interrupt request signals
corresponding to pin IRQ7 are detected by a rising
edge, falling edge, high level, or low level.
Note: When the USBF standby recovery interrupt
Reserved
These bits are always read as 0. The write value should
always be 0 or the bit7 in IMR0 should be set to 1. If 1
is written to these bits, correct operation cannot be
guaranteed.
Bit 2n+1 Bit 2n
IRQ71S
0
0
1
1
request need not to be detected, clear the bits 15
to 12 in IPRD to 0 or set the bit 7 in IMR0 to 1,
and the IRQ7 interrupt request should be
masked.
IRQ70S
0
1
0
1
Rev. 1.00, 02/04, page 207 of 804
Interrupt request (USBF
standby recovery interrupt
request) is detected at the
falling edge of IRQ7 input
Setting prohibited
Setting prohibited
Setting prohibited

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