HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 415

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
14.3
Each of the three channels has a 32-bit timer counter (TCNT) and a 32-bit timer constant register
(TCOR). The TCNT counts down. The auto-reload function enables synchronized counting.
14.3.1
When the STR0–STR2 bits in the timer start register (TSTR) are set to 1, the corresponding timer
counter (TCNT) starts counting. When a TCNT underflows, the UNF flag of the corresponding
timer control register (TCR) is set. At this time, if the UNIE bit in TCR is 1, an interrupt request is
sent to the CPU. Also at this time, the value is copied from TCOR to TCNT and the down-count
operation is continued.
1. Count Operation Setting Procedure
An example of the procedure for setting the count operation is shown in figure 14.2.
Note:
Counter Operation
Operation
When an interrupt has been generated, clear the flag in the interrupt handler that caused it.
If interrupts are enabled without clearing the flag, another interrupt will be generated.
interrupt generation
Set timer constant
Select operation
Select counter
Set underflow
Initialize timer
Start counting
register
counter
clock
Figure 14.2 Setting Count Operation
(1)
(2)
(3)
(4)
(5)
(1) Select the counter clock with the TPSC1 to
(2) Use the UNIE bit in TCR to set whether to
(3) Set a value in the timer constant register (TCOR)
(4) Set the initial value in the timer counter (TCNT).
(5) Set the STR bit in the timer start register (TSTR)
TPSC0 bits in the timer control register (TCR).
generate an interrupt when TCNT underflows.
to 1 to start operation.
(the cycle is the set value plus 1).
Rev. 1.00, 02/04, page 377 of 804

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