HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 119

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

3.3
3.3.1
In DSP mode, a specific function, zero overhead repeat control function, is provided to execute
repeat loops efficiently. By using this function, loop programs can be executed without overhead
caused by the compare and branch instructions. When describing the repeat loop, the repeat
control instructions in table 3.4, the repeat control macro instructions in table 3.5, and the DSP
mode extended system control instructions in table 3.6 are used.
Examples of Repeat Loop Programs: Examples of repeat loop programs are shown below.
• Example 1: Repeat loop consisting of 4 or more instructions
In the above program example, instructions from the RptStart address (instr1 instruction) to the
RptEnd address (instrN instruction) are repeated four times. These repeated instructions in the
program are called repeat loop. The start and end instructions of the repeat loop are called the
repeat start instruction and repeat end instruction, respectively. The CPU sequentially executes
instructions and starts repeat loop control if the CPU detects the completion of a specific
instruction. This specific instruction is called the repeat detection instruction. In a repeat loop
consisting of four or more instructions, an instruction three instructions prior to the repeat end
instruction is regarded as the repeat detection instruction. In a repeat loop consisting of four or
RptStart: instr1
RptDtct:
RptEnd2:
RptEnd1:
RptEnd:
CPU Extended Instructions
DSP Repeat Control
LDRS RptStart
LDRE RptStart +4
SETRC #4
Instr0
... ...
... ...
instr(N-3)
instr(N-2)
instr(N-1)
instrN
; Sets repeat start instruction address
; Sets the number of repetitions (4) to
; At least one instruction is required
; [Repeat start instruction]
;
;
;
;
; [Repeat end instruction]
to the RS register
address + 4) to the RE register
the RC[11:0] bits of the SR register
from SETRC instruction to [Repeat start
instruction]
; [Repeat start instruction]
; Sets (repeat detection instruction
end instruction is regarded as repeat
Three instruction prior to the repeat
detection instruction
Rev. 1.00, 02/04, page 81 of 804