HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 84

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

The little endian mode can also be specified as data format. Either big endian or little endian mode
should be selected according to the external pin (MD5 pin) at a power-on reset. When the MD5
pin goes low, the processor operates in big endian mode. When the MD5 pin goes high, the
processor operates in little endian mode. The endian mode cannot be changed dynamically.
In little endian mode, the MSB byte in the register corresponds to the highest address in the
memory, and the LSB byte in the register corresponds to the lowest address (figure 2.11). For
example, if the contents of the general register R0 is stored at an address indicated by the general
register R1 in longwords, the MSB byte of R0 is stored at the address indicated by the (R1 + 3)
and the LSB byte of R0 is stored at the address indicated by R1.
If little endian mode is selected, the on-chip memory of this LSI is accessed in little endian mode.
However, the on-chip device registers assigned to memory are accessed in big endian mode. Note
that the available access size (byte, word, or longword) differs in each register.
Note: The CPU instruction codes of this LSI must be stored in words. In little endian mode, the
Rev. 1.00, 02/04, page 46 of 804
Byte position
Byte position
Byte position
Byte position
in memory
in memory
in R0
in R0
instruction code must be stored from lower byte to upper byte in this order from the word
boundary on the memory.
31
31
@(R1+3) @(R1+2) @(R1+1) @(R1+0)
@(R1+0) @(R1+1) @(R1+2) @(R1+3)
[7:0]
23
Example: MOV.B R0, @R1
23
Example: MOV.B R0, @R1
Figure 2.11 Data Format on Memory (Little Endian Mode)
(a) Byte access
Figure 2.10 Data Format on Memory (Big Endian Mode)
(a) Byte access
(R1 = Address 4n)
(R1 = Address 4n)
15
15
7
7
[7:0]
[7:0]
[7:0]
0
0
@(R1+3) @(R1+2) @(R1+1) @(R1+0)
@(R1+0) @(R1+1) @(R1+2) @(R1+3)
[15:8]
Example: MOV.W R0, @R1
Example: MOV.W R0, @R1
(b) Word access
(b) Word access
[7:0]
(R1 = Address 4n)
(R1 = Address 4n)
[15:8]
[15:8]
[15:8]
[7:0]
[7:0]
[7:0]
@(R1+3) @(R1+2) @(R1+1) @(R1+0)
@(R1+0) @(R1+1) @(R1+2) @(R1+3)
[31:24]
[31:24]
[31:24]
[31:24]
Example: MOV.L R0, @R1
(c) Longword access
Example: MOV.L R0, @R1
(c) Longword access
(R1 = Address 4n)
[23:16]
[23:16]
[23:16]
[23:16]
(R1 = Address 4n)
[15:8]
[15:8]
[15:8]
[15:8]
[7:0]
[7:0]
[7:0]
[7:0]