HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 563

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
6
5
4
3
2
Bit Name
RHSC
FNO
UE
RD
SF
Initial
Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Root Hub Status Change Interrupt Disable
When this bit is set to 1, an interrupt generation by the
Root Hub Status Change event is masked. When 1 is
written to the RHSC bit in the HcInterruptEnable register,
this bit is cleared to 0.
0: This bit is ignored.
1: Disables interrupt generation due to the Root Hub
Frame Number Overflow Interrupt Disable
When this bit is set to 1, an interrupt generation by the
Frame Number Overflow event is masked. When 1 is
written to the FNO bit in the HcInterruptEnable register,
this bit is cleared to 0.
0: This bit is ignored.
1: Disables interrupt generation due to the Frame
Unrecoverable Error Interrupt Disable
When this bit is set to 1, an interrupt generation by the
Unrecoverable Error event is masked. When 1 is written
to the UE bit in the HcInterruptEnable register, this bit is
cleared to 0.
0: This bit is ignored.
1: Disables interrupt generation due to the Unrecoverable
Resume Detected Interrupt Disable
When this bit is set to 1, an interrupt generation by the
Resume Detected event is masked. When 1 is written to
the RD bit in the HcInterruptEnable register, this bit is
cleared to 0.
0: This bit is ignored.
1: Disables interrupt generation due to the Resume
Start of Frame Interrupt Disable
When this bit is set to 1, an interrupt generation by the
Start of Frame event is masked. When 1 is written to the
SF bit in the HcInterruptEnable register, this bit is cleared
to 0.
0: This bit is ignored.
1: Disables interrupt generation due to the Start of Frame
Status Change event.
Number Overflow event.
Error event.
Detected event.
event.
Rev. 1.00, 02/04, page 525 of 804