HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 666

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
23.1.2
PADR is a 7-bit readable/writable register that stores data for pins PTA6 to PTA0. Bits PA6DT to
PA0DT correspond to pins PTA6 to PTA0. When the pin function is general output port, if the
port is read, the value of the corresponding PADR bit is returned directly. When the function is
general input port, if the port is read, the corresponding pin level is read.
Table 23.1 Port A Data Register (PADR) Read/Write Operations
Notes: 1. For details on PACR, refer to section 24, Pin Function Controller (PFC).
Rev. 1.00, 02/04, page 628 of 804
Bit
7
6
5
4
3
2
1
0
PAnMD1*
0
1
PACR State*
2. n = 0 to 6
Bit Name
PA6DT
PA5DT
PA4DT
PA3DT
PA2DT
PA1DT
PA0DT
Port A Data Register (PADR)
2
PAnMD0*
0
1
0
1
1
Initial
Value
0
0
0
0
0
0
0
0
2
Pin State
Other
function
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read
PADR value
PADR value
Pin state
Pin state
Description
Reserved
This bit is always read as 0. The write value should
always be 0. If 1 is written to this bit, correct operation
cannot be guaranteed.
Table 23.1 shows the function of PADR.
Write
Value is written to PADR, but does not affect
pin state.
Write value is output from pin.
Value is written to PADR, but does not affect
pin state.
Value is written to PADR, but does not affect
pin state.

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