HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 332

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1. An external circuit can be connected that releases the slave device reset by the master device.
2. The master can set a flag to the devices such as an SRAM that does not require initialization
3. An external circuit can be connected to generate an interrupt from the master device to a slave
If self-refresh mode is specified for the SDRAM, the master device does not release the bus. If a
transition is underway to standby mode, or if the master clock stops because of a frequency
change, the master device cannot release the bus. To prevent the slave from issuing bus requests
in a case such as this, the slave must be put into the sleep state.
Rev. 1.00, 02/04, page 294 of 804
after initialization and the slave initiates access after checking to see that the flag has been set.
device after initialization. The slave is released from the wait state by the interrupt.
Master mode
D15 to D0
A23 to A0
RD/WR
BREQ
DQMn
BACK
WAIT
CKIO
WEn
CKE
RAS
CAS
CSn
RD
BS
Figure 9.34 Master and Slave Connection Example
Other devices
SRAM
SDRAM
Slave mode
CKIO
BREQ
BACK
CSn
BS
RD/WR
RD
WEn
CKE
RAS
CAS
DQMn
WAIT
A23 to A0
D15 to D0

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