HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 633

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

The data to be transmitted is written to the data register using this interrupt. After the first transmit
data write for one FIFO, the other FIFO is empty, and so the next transmit data can be written to
the other FIFO immediately. When both FIFOs are full, IFR0/EP2i EMPTY is cleared to 0. If at
least one FIFO is empty, IFR0/EP2i EMPTY is set to 1. When ACK is returned from the host after
data transmission is completed, the FIFO used in the data transmission becomes empty. If the
other FIFO contains valid transmit data at this time, transmission can be continued.
When transmission of all data has been completed, write 0 to IER0/EP2i EMPTY IE and disable
interrupt requests.
20.4.6
EP2o, 6 Bulk-Out Transfer (Dual FIFOs)
Clear EP2o FIFO full status
Set EP2o FIFO full status
Data reception from host
(IFR0/EP2o FULL = 1)
(IFR0/EP2o FULL = 0)
OUT token reception
EP2o FIFOs empty?
in EP2o FIFO?
USB function
Figure 20.14 EP2o Bulk-Out Transfer Operation
Space
Both
Yes
Yes
ACK
NACK
No
No
Interrupt request
Interrupt request
Read EP2o receive data
data register (EPDR2o)
(TRG/EP2o RDFN = 1)
size register (EPSZ2o)
Read data from EP2o
Write 1 to EP2o read
Rev. 1.00, 02/04, page 595 of 804
Application
complete bit