HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 778

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

28.3.2
Table 28.6 Control Signal Timing
Conditions: V
Notes: 1. RESETP, NMI, IRQ4 to IRQ2, and IRQ0 are asynchronous. Changes are detected at
Rev. 1.00, 02/04, page 740 of 804
Item
RESETP pulse width
RESETP setup time*
RESETP hold time
BOOT-E setup time*
BREQ setup time
BREQ hold time
NMI setup time*
NMI hold time
IRQ4 to IRQ2, IRQ0 setup time*
IRQ4 to IRQ2, IRQ0 hold time
IRQOUT delay time
REFOUT delay time
BACK delay time
Bus tri-state delay time 1
Bus tri-state delay time 2
Bus buffer-on time 1
Bus buffer-on time 2
2. The upper limit of the external bus clock is 60 MHz.
3. tcyc means the external bus clock cycle (Bφ clock cycle)
4. The BOOT-E signal should not be changed excluding for the period when RESETP
Control Signal Timing
the clock rise when the setup time shown is used. If the setup time cannot be used,
detection may be delayed until the next clock rises.
The pulse width of two cycles or more in peripheral module clock (Pφ) is necessary for
NMI and IRQ4 to IRQ2 and IRQ0 at the edge detection.
asserts low (during the reset period). If the BOOT-E signal is changed excluding the
reset period, operation cannot be guaranteed.
Ta = –40 to 85°C*
CC
1
= 2.7 to 3.6 V, V
4
1
2
1
CC
_28= 2.7 to 3.0 V, AV
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RESPW
RESPS
RESPH
BOOTS
BREQS
BREQH
NMIS
NMIH
IRQS
IRQH
IRQOD
REFOD
BACKD
BOFF1
BOFF2
BON1
BON2
Min
100
30
4
50
1/2t
1/2t
20
4
20
4
—
—
1/2t
0
0
0
0
cyc
cyc
cyc
*
+ 3
3
CC
+ 7
= 2.7 to 3.6 V, V
Max
—
—
—
—
—
—
—
—
—
—
13
13
1/2t
30
30
30
30
cyc
+ 13 ns
Unit
µs
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DD
= 1.4 to 1.6 V,
Figure
28.9, 28.10
28.9
28.13
28.10
28.11
28.12
28.13, 28.14
28.13, 28.14