HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 147

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

The DSP unit incorporates the DSP status register (DSR) which is used as a control register. The
DSR register stores the DSP data operation result (zero, negative, others). The DSR register also
has the DC bit whose function is similar to the T bit of the CPU register. The DC bit functions as
status flag. Conditional DSP data operations are controlled based on the DC bit. These operation
control affects only the DSP unit instructions. In other words, these operations control affects
only the DSP registers and does not affect address register update and CPU instructions such as
load and store instructions. A condition to be reflected on the DC bit should be specified to the
DC status selection bits (CS[2:0]).
The unconditional DSP type data operation instructions other than PMULS, MOVX, MOVY, and
MOVS change the condition flag and DC bit. However, the CPU instructions including the MAC
instruction do not modify the DC bit. In addition, conditional DSP data operation instructions do
not modify the DSR.
Table 3.16 DSR Register Bits
Bits
31 to 12 
11 to 9
8
Bit Name
TS2 to
TS0
TC
Initial
Value
All 0
All 0
0
R/W
R
R/W
R/W
Function
Reserved
These bits are always read as 0. The write value
should always be 0. If 1 is written to these bits, correct
operation cannot be guaranteed.
T Bit Status Selection
Specifies the operation result status to be set in the T
bit in the SR register if the TC bit is 1. If the S bit of
the SR register is set to 1, an overflow is detected.
000: Carry/borrow mode
001: Negative value mode
010: Zero mode
011: Overflow mode
100: Signed greater mode
101: Signed greater than or equal to mode
110: Reserved (setting prohibited)
111: Reserved (setting prohibited)
TC Bit
0: The T bit of the SR register is not affected by the
1: The T bit of the SR register changes according to
DSP instruction.
the TS bit of the DSR register while the DSP
instruction is executed. Note, however, the T bit
does not change during conditional DSP instruction
execution.
Rev. 1.00, 02/04, page 109 of 804