HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 315

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Refreshing: This LSI has a function for controlling synchronous DRAM refreshing. Auto-
refreshing can be performed by clearing the RMODE bit to 0 and setting the RFSH bit to 1 in
SDCR. A continuous refreshing can be performed by setting the RRC[2:0] bits in RTCSR. If
SDRAM is not accessed for a long period, self-refresh mode, in which the power consumption for
data retention is low, can be activated by setting both the RMODE bit and the RFSH bit to 1.
1. Auto-refreshing
Refreshing is performed at intervals determined by the input clock selected by bits CKS[2:0] in
RTCSR, and the value set by in RTCOR. The each register should be set so as to satisfy the
refresh interval stipulation for the SDRAM used. First make the settings for RTCOR, RTCNT,
and the RMODE and RFSH bits in SDCR, then make the CKS[2:0] and RRC[2:0] in RTCSR
settings. When the clock is selected by bits CKS[2:0], RTCNT starts counting up from the
value at that time. The RTCNT value is constantly compared with the RTCOR value, and if the
two values are the same, a refresh request is generated and an auto-refresh is performed for the
number of times specified by the RRC[2:0]. At the same time, RTCNT is cleared to zero and
the count-up is restarted. Figure 9.23 shows the auto-refresh cycle timing.
Figure 9.22 Single Write Timing (Bank Active, Different Row Addresses)
D15 to D0
A23 to A0
DACK*
RD/WR
Notes: 1. Address pin to be connected to the A10 pin of SDRAM.
DQMn
A11*
CKIO
RAS
CAS
CS3
BS
1
2
2. The waveform for DACK is when active low is specified.
PRE
Tp
NOP
Tpw
ACTV
Tr
WRIT
Tc1
Rev. 1.00, 02/04, page 277 of 804

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