HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 731

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

26.4.2
Table 26.4 lists the reset configuration of this LSI.
Table 26.4 Reset Configuration
Notes: 1. Performs normal mode or ASE mode settings
26.4.3
The timing for switching data output from the TDO in normal mode changes at the TCK falling
edge. This is a timing defined by the JTAG standard. This timing for switching data output from
the TDO varies if the emulator function is used in ASE mode. For details on the timing, refer to
the emulator’s user’s manual.
ASEMD0*
H
L
TDO
(when the boundary
scan command is set)
2. In ASE mode, reset hold is enabled by driving the RESETP and TRST pins low for a
Reset Configuration
TDO Output Timing
1
ASEMD0 = H, normal mode
ASEMD0 = L, ASE mode
constant cycle. In this state, the CPU does not start up, even if RESETP is driven high.
When TRST is driven high, H-UDI operation is enabled, but the CPU does not start up.
The reset hold state is cancelled by the following:
• Another RESETP assert (power-on reset)
• TRST reassert
TCK
RESETP
L
H
L
H
Figure 26.3 H-UDI Data Transfer Timing
TRST
L
H
L
H
L
H
L
H
Chip State
Normal reset and H-UDI reset
Normal reset
H-UDI reset only
Normal operation
Reset hold*
Normal reset
H-UDI reset only
Normal operation
2
Rev. 1.00, 02/04, page 693 of 804
t
TDO